As the voltage is decreased to 4.9 V, only some of the least significant bits are cleared. Since the reference voltage is 5 V, when the input voltage is also 5 V, all bits are set.
![successive approximation analog to digital converter successive approximation analog to digital converter](https://media.cheggcdn.com/media/831/83152584-cf78-4efe-bad9-ed4517ba3757/image.png)
Approximation value on the y axis.Įxample: The ten steps to converting an analog input to 10 bit digital, using successive approximation, are shown here for all voltages from 5 V to 0 V in 0.1 V iterations.
![successive approximation analog to digital converter successive approximation analog to digital converter](https://image.slidesharecdn.com/successiveapproximationadc-12675745947856-phpapp02/95/successive-approximation-adc-9-728.jpg)
Operation of successive Approximation ADC as input voltage falls from 5 to 0 V. A register to store the output of the comparator and apply x i−1 − s( x i−1 − x)/2 i.A comparator to perform the function s( x i − x) by comparing the DAC's voltage with the input voltage.A DAC to convert the ith approximation x i to a voltage.A reference voltage source V ref to normalize the input.It follows using mathematical induction that | x n − x| ≤ 1/2 n.Īs shown in the above algorithm, a SAR ADC requires: ith approximation x i = x i−1 − s( x i−1 − x)/2 i, where, s( x) is the signum function (sgn( x) = +1 for x ≥ 0, −1 for x The objective is to approximately digitize x to an accuracy of 1/2 n. Mathematically, let V in = xV ref, so x in is the normalized input voltage.
SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER CODE
The resulting code is the digital approximation of the sampled input voltage and is finally output by the SAR at the end of the conversion (EOC). Then the next bit is set to 1 and the same test is done, continuing this binary search until every bit in the SAR has been tested. If this analog voltage exceeds V in, then the comparator causes the SAR to reset this bit otherwise, the bit is left as 1.
![successive approximation analog to digital converter successive approximation analog to digital converter](https://microcontrollerslab.com/wp-content/uploads/2021/03/Successive-Approximation-ADC-block-diagram.jpg)
This code is fed into the DAC, which then supplies the analog equivalent of this digital code ( V ref/2) into the comparator circuit for comparison with the sampled input voltage. The successive approximation register is initialized so that the most significant bit (MSB) is equal to a digital 1. Animation of a 4-bit successive-approximation ADC